1. Field of the Invention
One embodiment of the present invention relates to a semiconductor device and an electronic device.
Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one embodiment of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. Another embodiment of the present invention relates to a process, a machine, manufacture, or a composition of matter. Another embodiment of the present invention relates to a semiconductor device, a display device, a lighting device, a power storage device, a memory device, or a driving method or manufacturing method thereof.
2. Description of the Related Art
Memory devices using semiconductor elements are roughly classified into a volatile memory device that loses stored data when power supply stops and a non-volatile memory device that retains stored data even when power supply stops.
A typical example of a volatile memory device is a dynamic random access memory (DRAM). A DRAM stores data in such a manner that a transistor included in a memory element is selected and charge is accumulated in a capacitor.
Once data is read from a DRAM, charge in a capacitor is lost according to the principle; thus, another writing operation is necessary every time data is read. A transistor included in a memory element has leakage current (off-state current) or the like between a source and a drain in an off state and charge flows into or out even when the transistor is not selected, so that a data retention period is short. For that reason, another writing operation (refresh operation) is necessary at predetermined intervals; thus, it is difficult to sufficiently reduce power consumption. Furthermore, since stored data is lost when power supply stops, an additional memory device using a magnetic material or an optical material is needed in order to store the data for a long time.
Another example of a volatile memory device is a static random access memory (SRAM). An SRAM retains stored data using a circuit such as a flip-flop and thus does not need refresh operation, which is an advantage over a DRAM. However, cost per storage capacity is high because a circuit such as a flip-flop is used. Moreover, as in a DRAM, stored data in an SRAM is lost when power supply stops.
A typical example of a nonvolatile memory device is a flash memory. A flash memory includes a floating gate between a gate electrode and a channel formation region of a transistor and stores data by holding charge in the floating gate. Thus, a flash memory has advantages in that a data retention period is extremely long (semi-permanent) and refresh operation which is necessary in a volatile memory device is not needed (for example, see Patent Document 1).
However, a gate insulating layer included in a memory element deteriorates by tunneling current generated in writing, which causes a problem in that the memory element stops its function after a predetermined number of times of writing. In order to reduce adverse effects of this problem, a method in which the number of writing operations for memory elements is equalized is employed, for example. However, a complicated peripheral circuit is needed to achieve this method. Moreover, employing such a method does not solve the fundamental problem of lifetime. This means that a flash memory is not suitable for applications in which data is frequently rewritten.
In addition, high voltage is necessary for injection of electric charge to the floating gate or removal of the electric charge, and a circuit for generating high voltage is also necessary. Thus, there is a problem of high power consumption. Furthermore, it takes a relatively long time to inject or remove charge, and it is not easy to increase the speed of writing or erasing data.
In the flash memory, in order to increase storage capacity, a “multilevel” flash memory that stores data with greater than two levels in one memory cell is proposed (for example, see Patent Document 2).
In addition, in a multilevel memory, a “writing verify operation” of detecting a writing state of a memory cell after data is written is conducted in order to precisely control the state of the data writing to the memory cell (for example, see Patent Document 3).